The present invention relates to a method and apparatus for equalizing the biasing of a transistor memory cell during the READ mode across those cells which are non-selected. The invention is applicable to read only memory cells (ROMS), programmable read only memory cells (PROMS) and electrically programmable read only memory cells (EPROMS).
Previously, a reference signal was used to drive independent bit line and array source drivers in order to condition the floating gate transistors for a READ cycle in an array of programmable and electrically programmable read only memory cells. The variation of the voltage level on the drain of the floating gate transistor being read due to threshold voltage or V.sub.T variations of the above-mentioned drivers rendered more uncertain the correct detection of the cell state. In addition, because the driver of the bit line operated in a mode in which its gate voltage was not more than a V.sub.T above its drain, not only was its source voltage V.sub.T dependent, but whenever the bit line voltage rose suddenly, the latter bit line driver became non-conducting and resulted in trapping the bit line voltage in a higher than normal state.
Accordingly, it is a principal object of this invention to provide an improved biasing arrangement for an array of transistor memory cells.